Senior DFT Engineer

A Semiconductor industry DFT Engineering professional will take responsibility for driving the design implementation and simulations through to successful tape-out for an innovative leader in high speed chip to chip link solutions; revolutionizing the electronics industry. Based in Lausanne.
Technical Competencies for the DFT Engineer:
* Minimum of a good Bachelors degree in Electronics or similar discipline.
* 5+ years DFT experience.
* Experience with MBIST insertion, simulation and verification on RTL and Gate level Netlist.
* Experience with Scan insertion.
* Good knowledge of Verilog HDL.
* Hands-on experience using EDA tools for DFT such as Cadence, Mentor or Synopsys.
* STA DFT test mode timing constraint development and analysis.
* TCL Scripting.
The DFT Engineer role: The successful DFT Engineer will drive architectures, methodologies and tool flows for complex multi-million gate designs. With a good understanding of ATE, you’ll drive the test engineering team for successful Silicon bring up and test program development; will define the test plans and develop functional tests for final/wafer test program development.
A generous salary will be offered with Shares on offer, Hybrid working and flexible working